HDMP-0422 查看數據表（PDF） - HP => Agilent Technologies

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HDMP-0422

Single Port Bypass Circuit with CDR & Data Valid Detection Capability for Fibre Channel Arbitrated Loops

HP => Agilent Technologies 

Simplified I/O Cells

O_LVTTL

VCC

I_LVTTL

VCC

VCC

GND

ESD

PROTECTION

GND

ESD

PROTECTION

Figure 9. O-LVTTL and I-LVTTL simplified circuit schematic.

GND

VBB

1.4 V

75 Ω

HS_OUT

VCCHS

VCC

VCC

VCC

TO_NODE[n]+

Z0 = 75 Ω 0.01 µF FM_NODE[n]+

HS_IN

+

–+

–

ESD

PROTECTION

TO_NODE[n]–

GND

GND

2*Z0 = 150 Ω

Z0 = 75 Ω 0.01 µF

FM_NODE[n]–

GND

GND

ESD

PROTECTION

NOTE:

1. FM_NODE[n] INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT.

Figure 10. HS_OUT and HS_IN simplified circuit schematic.

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