HEF40175B 查看數據表（PDF） - NXP Semiconductors.
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HEF40175B Datasheet PDF : 15 Pages
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NXP Semiconductors
12. Waveforms
HEF40175B
Quad D-type flip-flop
VI
MR input
0V
VI
CP input
VM
0V
VI
Dn input
0V
VOH
Qn output
VOL
tPLH
VM 90 %
10 %
tTLH
tPHL
tTHL
tPHL
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a. CP and MR to Qn Propagation delays and Qn transition times
VI
CP input
0V
VI
Dn input
0V
VI
MR input
0V
VM
tsu
th
VM
1/fmax
tW
trec
VM
tW
001aae568
b. Minimum pulse widths for CP and MR, MR to CP recovery time, and set-up and hold time for Dn to CP
VOH and VOL are typical output voltage levels that occur with the output load.
Set-up and hold times are shown as positive values but may be specified as negative values.
The shaded area are where input changes result in predicable output performance.
Measurement points are given in Table 9.
Fig 5. Waveforms showing switching times
HEF40175B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 14 December 2010
© NXP B.V. 2010. All rights reserved.
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