HEF4521BPB 查看數據表（PDF） - Philips Electronics

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HEF4521BPB

24-stage frequency divider and oscillator

Philips Electronics 

Philips Semiconductors

24-stage frequency divider and oscillator

Product specification

HEF4521B

MSI

COUNT CAPACITY

Fig.2 Pinning diagram.

HEF4521BP(N): 16-lead DIL; plastic (SOT38-1)

HEF4521BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)

HEF4521BT(D): 16-lead SO; plastic (SOT109-1)

( ): Package Designator North America

OUTPUT

O18

O19

O20

O21

O22

O23

O24

COUNT CAPACITY

218 = 262 144

219 = 524 288

220 = 1 048 576

221 = 2 097 152

222 = 4 194 304

223 = 8 388 608

224 = 16 777 216

FUNCTIONAL TEST SEQUENCE

INPUTS

MR

I2

H

L

CONTROL

TERMINALS

O2

VSS’

VDD’

L

VDD

VSS

L

VDD

VSS

L

L

L

VSS

VSS

L

H

L

VSS

VSS

L

H

L

VSS

VDD

L

VSS

VDD

A test function has been included for the reduction of the

test time required to exercise all 24 counter stages. This

test function divides the counter into three 8-stage

sections by connecting VSS’ to VDD and VDD’ to VSS. Via

I2 (connected to O2) 255 counts are loaded into each of

the 8-stage sections in parallel. All flip-flops are now at a

HIGH state.

OUTPUTS

O18 to O24

L

H

H

H

H

L

REMARKS

counter is in three 8-stage sections

in parallel mode; I2 and O2 are

interconnected (O2 is now input);

counter is reset by MR

255 pulses are clocked into I2, O2

(the counter advances on the LOW

to HIGH transition)

VSS’ is connected to VSS

the input I2 is made HIGH

VDD’ is connected to VDD; O2 is

now made floating and becomes an

output; the device is now in the

224 mode

counter ripples from an all HIGH

state to an all LOW state

The counter is now returned to the normal 24-stage in

series configuration by connecting VSS’ to VSS and VDD’ to

VDD. One more pulse is entered into input I2, which will

cause the counter to ripple from an all HIGH state to an all

LOW state.

January 1995

3

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