HEF4521BPB 查看數據表（PDF） - Philips Electronics
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HEF4521BPB Datasheet PDF : 11 Pages
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Philips Semiconductors
24-stage frequency divider and oscillator
Product specification
HEF4521B
MSI
VDD
V
SYMBOL MIN. TYP. MAX.
Output transition times
HIGH to LOW
LOW to HIGH
5
10 tTHL
15
5
10 tTLH
15
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL MIN. TYP. MAX.
Minimum I2 pulse
width; HIGH
Minimum MR
pulse width; HIGH
Recovery time
for MR
Maximum clock
pulse frequency
5
10
tWI2H
15
5
10
tWMRH
15
5
10
tRMR
15
5
10
fmax
15
80 40
40 20
30 15
70 35
40 20
30 15
20 −10
15 −5
15
0
6 12
12 25
17 35
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
TYPICAL
EXTRAPOLATION
FORMULA
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
see also waveforms
Fig.5
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
1 200 fi + ∑ (foCL) × VDD2
10
5 100 fi + ∑ (foCL) × VDD2
15
13 050 fi + ∑ (foCL) × VDD2
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
6
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