HM3-6508-9 查看數據表（PDF） - Intersil

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HM3-6508-9

1024 x 1 CMOS RAM

Intersil 

HM-6508

March 1997

1024 x 1 CMOS RAM

Features

Description

• Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max

• Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max

• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . 180ns Max

• Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . .2.0V Min

• TTL Compatible Input/Output

• High Output Drive - 2 TTL Loads

• On-Chip Address Register

The HM-6508 is a 1024 x 1 static CMOS RAM fabricated

using self-aligned silicon gate technology. Synchronous

circuit design techniques are employed to achieve high per-

formance and low power operation.

On-Chip latches are provided for address, allowing efficient

interfacing with microprocessor systems. The data output

buffers can be forced to a high impedance state for use in

expanded memory arrays.

The HM-6508 is a fully static RAM and may be maintained in

any state for an indefinite period of time. Data retention supply

voltage and supply current are guaranteed over temperature.

Ordering Information

PACKAGE

PDIP

CERDIP

TEMPERATURE

RANGE

-40oC to +85oC

-40oC to +85oC

180ns

HM3-6508B-9

HM1-6508B-9

250ns

HM3-6508-9

HM1-6508-9

PKG. NO.

E16.3

F16.3

Pinout

HM-6508

(PDIP, CERDIP)

TOP VIEW

E1

A0 2

A1 3

A2 4

A3 5

A4 6

Q7

GND 8

16 VCC

15 D

14 W

13 A9

12 A8

11 A7

10 A6

9 A5

PIN

DESCRIPTION

A

Address Input

E

Chip Enable

W

Write Enable

D

Data Input

Q

Data Output

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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