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HM9270C 查看數據表(PDF) - ELAN Microelectronics

零件编号
产品描述 (功能)
生产厂家
HM9270C
EMC
ELAN Microelectronics EMC
HM9270C Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
HM 9270C/D
DTMF RECEIVER
FIGURE 5. TIMING DIAGRAM
EVENTS
t REC
ESt
A
B
t REC
TONE # n
t
DP
t GTP
D
C
E
INTERDIGIT
PAUSE t ID
TONE #n+1
t DA
t
GTA
St/GT
DATA
OUTPUTS
Q1-Q4
StD
OUTPUT
TOE
DECODE TONE n-1
t
PQ
DECODED
TONE#n
t PS t D
HIGH
IMPEDANCE
t
PTE
F
G
TONE DROPOUT
t DO
TONE#n+1
V Tst
DECODED TONE # n + 1
t
PTD
A. Short tone bursts: detected. Tone duration is invalid.
B. Tone #n is detected. Tone duration is valid. Decoded
to outputs.
C. End of tone #n is dectected and validated.
0
D. 3 State outputs disabled (high impedance).
E. Tone #n + 1 is detected. Tone duration is valid. De
10
coded to outputs.
20
F. Tristate outputs are enabled. Acceptable drop out of
tone #n + 1 does not negister at outputs.
30
G. End of tone #n + 1 is detected and validated.
40
FIGURE 5. TIMING DIAGRAM
50
STEERING CIRCUIT
60
Before registration of a decoded tone-pair, the receiver checks
70
for a valid signal duration (referred to as "character-recogni-
tion-condition"). This check is per-
80
formed by an external RC time-constant driven by ESt.
A logic high on ESt causes V (see Fig. 5) to rise as the
C
0
1K
2K
capacitor discharges. Provided signal-condition is main-
tained (ESt remains high) for the validation period (t ), Vc
GTP
reaches the threshold (VTSt) of the steering logic to register the
tone-pair, latching its corresponding 4-bit code (see Fig. 3)
into the output latch. At this point,
FIGURE 6. TYPICAL FILTER
CHARACTERISTIC
the GT output is activated and drives VC to VDD. GT continues to drive high as long as ESt remains high. Finally
after a short delay to allow the output latch to settle, the "delayed-steering" output flag, StD, goes high, signaling
that a recieved tone-pair has been registered. The contents of the output lacth are made available on the 4-bit
output bus by raising the 3-state control input (TOE) to a logic high. The steering circuit works in reverse to
validate the interdigit paues between signals. Thus, as well as rejecting signals too short to be considered valid, the
receiver will tolerate signal interruptions ("drop-out") too short to be considered a valid pause. The facility, together
with the capability of selecting the steering time-constants externally, allows the designer to tailor performance to
meet a wide variety of system requiremetns.
-7-

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