HMA510GM-55 查看數據表（PDF） - Intersil

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HMA510GM-55

16 x 16-Bit CMOS Parallel Multiplier Accumulator

Intersil 

AC Test Circuit

DUT

V1

R1

C1 (SEE NOTE)

HMA510/883

AC Testing Input, Output Waveforms

VIH

1.5V

VIL

1.5V

VOH

VOL

NOTE: Includes Stray and Jig Capacitance

NOTE: AC Testing: All Parameters tested as per test circuit. Input

rise and fall times are driven at 1ns/V.

Timing Diagram

DATA

INPUT

CLOCK

INPUT

tS tH

3.0V

1.5V

0V

THREE

STATE

CONTROL

3.0V

1.5V

0V

OUTPUT

THREE

STATE

1.5V

tDIS

tENA

HIGH IMPEDANCE

FIGURE 1. SET-UP AND HOLD TIME

FIGURE 2. THREE-STATE CONTROL

CLKX

CLKY

XIN, YIN

tS

RND, TC

ACC, SUB

CLKP

OUTPUT P, Y

tPWH

tPWL

tH

tHCL

tMA

tD

FIGURE 3. HMA510 TIMING DIAGRAM

tPWH

tPWL

CLKP

PREL

OEX

OEM

OEL

OUTPUT

PINS

tS

tH

FIGURE 4. PRELOAD TIMING DIAGRAM

3-15

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