HMP8190 查看數據表（PDF） - Intersil
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HMP8190 Datasheet PDF : 32 Pages
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HMP8190, HMP8191
TABLE 5. TYPICAL VIDEO TIMING PARAMETERS
PIXELS PER LINE
HBLANK REGISTER VALUES
VBLANK REGISTER VALUES
VIDEO STANDARD
TOTAL ACTIVE
START
END
START
END
RECTANGULAR PIXELS (BT.601)
(M) NTSC
(B, D, G, H, I) PAL
(M) PAL
(N) PAL
(NC) PAL
858
720
842 (0x34a)
122 (0x7a)
259 (0x103)
19 (0x13)
864
720
853 (0x355)
133 (0x85)
310 (0x136)
22 (0x16)
858
720
842 (0x34a)
122 (0x7a)
259 (0x103)
19 (0x13)
864
720
853 (0x355)
133 (0x85)
309 (0x135)
21 (0x15)
864
720
853 (0x355)
133 (0x85)
310 (0x136)
22 (0x16)
SQUARE PIXELS
(M) NTSC
(B, D, G, H, I) PAL
(M) PAL
(N) PAL
(NC) PAL
780
640
758 (0x2f6)
118 (0x76)
259 (0x103)
19 (0x13)
944
768
923 (0x39b)
155 (0x9b)
310 (0x136)
22 (0x16)
780
640
758 (0x2f6)
118 (0x76)
259 (0x103)
19 (0x13)
944
768
923 (0x39b)
155 (0x9b)
309 (0x135)
21 (0x15)
944
768
923 (0x39b)
155 (0x9b)
310 (0x136)
22 (0x16)
CLK2
(MHz)
27.0
27.0
27.0
27.0
27.0
24.54
29.5
24.54
29.5
29.5
The delay from the active edge of HSYNC to the 50% point
of the composite sync is 4-39 CLK2 cycles depending on the
HMP8190/HMP8191 operating mode. The delay is shortest
when the encoder is the timing master; it is longest when in
slave mode.
CLK2 Input Timing
The CLK2 input clocks all of the HMP8190/HMP8191,
including its video timing counters. For proper operation, all
of the HMP8190/HMP8191 inputs must be synchronous with
CLK2. The frequency of CLK2 depends on the device’s
operating mode and the total number of pixels per line. The
standard clock frequencies are shown in Table 5.
Note that the color subcarrier is derived from the CLK2 input.
Any jitter on CLK2 will be transferred to the color subcarrier,
resulting in color changes. Just 400ps of jitter on CLK2 causes
up to a 1 degree color subcarrier phase shift. Thus, CLK2
should be derived from a stable clock source, such as a crystal.
The use of a PLL to generate CLK2 is not recommended.
Video Processing
Upsampling
The encoder begins the video processing with the pixel input
data. It converts the 4:2:2 YCbCr data to 4:4:4 data. The
conversion is done by 2x upsampling the Cb and Cr data.
The CbCr upsampling function uses linear interpolation. The
HMP8190/HMP8191 then upsamples the 4:4:4 data to
generate 8:8:8 data. Again, the encoder uses linear
interpolation for the upsampling.
Horizontal Filtering
Unless disabled, the HMP8190/HMP8191 lowpass filters the
Y data to 6.0MHz. Lowpass filtering Y removes any aliasing
artifacts due to the upsampling process, and simplifies the
analog output filters. The Y 6.0MHz lowpass filter response
is shown in Figure 8. At this point, the HMP8190/HMP8191
also scales the Y data to generate the proper output levels
for the various video standards.
The HMP8190/HMP8191 lowpass filters the Cb and Cr data
to 1.3MHz prior to modulation. The lowpass filtering removes
any aliasing artifacts due to the upsampling process
(simplifying the analog output filters) and also properly
bandwidth-limits Cb and Cr prior to modulation. The
chrominance filtering is not optional like luminance filtering.
The Cb and Cr 1.3MHz lowpass filter response is shown in
Figure 9.
Color Subcarrier Generation
The HMP8190/HMP8191 uses a numerically controlled
oscillator (NCO) clocked by CLK2 and a sine look up ROM to
generate the color subcarrier. As shown in Figure 7, the
phase increment value (PHINC) of the NCO may come from
the encoder’s internal look up table, BT.656 ancillary data, or
a control register. The PHINC source is selected in timing
I/O register 2.
INTERNAL
BT.656
I2C
PHINC
+
D
Q
PHINT
CLK2
PHINC
SELECT
NCO RESET
FIGURE 7. COLOR SUBCARRIER GENERATION NCO
7
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