HS7512 查看數據表（PDF） - Signal Processing Technologies

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HS7512

Double–Buffered 12-Bit Multiplying DAC

Signal Processing Technologies 

SPECIFICATIONS (continued)

(Typical @ 25°C, nominal power supply, VREF = +10V, unipolar unless otherwise noted)

PARAMETER

MIN. TYP. MAX.

DYNAMIC PERFORMANCE

Digital Small Signal Settling

1.0

Full Scale Transition Settling

2.0

Reference Feedthrough Error

@ 1kHz

<1

@ 10kHz

2

Delay to output

from Bits input

100

from LDAC

200

from CE

120

POWER SUPPLY (VDD)

Operating Voltage

Voltage Range

Current

Rejection Ratio

+15 ±5%

+5

+16

2.5

0.002

ENVIRONMENTAL AND MECHANICAL

Operating Temperature

SP7512K

SP7512B

HS3120–C

HS3120–B

HS3120–B/883

Storage Temperature

Package

SP7512_N

HS3120–C

HS3120–B

0

+70

–40

+85

0

+70

–55

+125

–55

+125

–65

+150

28-pin SOIC

28–pin Plastic DIP

28–pin Side–Brazed DIP

UNITS

µS

µS

mV

mV

ns

ns

ns

V

V

mA

%/%

CONDITIONS

to 0.01% (strobed)

(VREF = 20Vpp)

Delay times are twice the

amount shown at TA = +125° C

specifications guaranteed

°C

°C

°C

°C

°C

°C

Notes:

1.

Using the internal feedback resistor, output leakage current creates an offset, which doubles every

10°C rise in temperature.

Corporation

SIGNAL PROCESSING EXCELLENCE

115

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