HS7512 查看數據表（PDF） - Signal Processing Technologies
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HS7512 Datasheet PDF : 6 Pages
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V REF
DIGITAL
INPUTS
CE
HBE
MBE
LBE
LDAC
V DD2
400Ω
+15V
V DD1
FB1
-15V
+15V
20KΩ
ADJUSTMENT
RANGE 0.2%
4MΩ
R OS1
SP7512
I O1
N.C.
FB 4
N.C. 4KΩ
FB 3
-
A1
+
VOUT
I O2
LDTR
VSS VSS1
1KΩ
R OS2
-
A2
+
3KΩ
V OUT1
A1, A2 , LF411ACN
Figure 2. Bipolar Operation
TRANSFER FUNCTION (N=12)
BINARY INPUT UNIPOLAR OUTPUT BIPOLAR OUTPUT
111...111
100...001
100...000
011...111
000...000
–VREF (1 – 2–N)
–VREF (1/2 + 2–N)
–VREF /2
–VREF (1/2 – 2–N)
0
Table 1. Transfer Function
–VREF (1 – 2 –(N – 1))
–VREF (2 –(N – 1))
0
VREF (2 ) –(N – 1)
V REF
a 28–pin SOIC. The HS3120 is available in
commercial and military temperature ranges,
packaged in a 28–pin side–brazed DIP. For
product processed and screened to the require-
ments of MIL–M–38510 and MIL–STD–883C,
please consult the factory (HS3120B only).
APPLICATIONS INFORMATION
Unipolar Operation
Figure 1 shows the interconnections for unipo-
lar operation. Connect IO1 and FB1 as shown in
diagram. Tie IO2 (Pin 7), FB3 (Pin 3), and FB4
(Pin 1) to Ground (Pin 8). To maintain specified
linearity, external amplifiers must be zeroed.
This is best done with VREF set to zero and, with
the DAC register loaded with all bits at zero,
adjust ROS for VOUT = 0V
Bipolar Operation
Figure 2 shows the interconnections for bipolar
operation. Connect IO1, IO2, FB1, FB3, FB4 as
shown in diagram. Tie LDTR to IO2. To main-
tain specified linearity, external amplifiers must
be zeroed. This is best done with VREF set to zero
and, the DAC register loaded with 10...0 (MSB
= 1), set ROS2 for VOUT1 = 0V. Then set ROS1 for
VOUT = 0V.
Grounding
Connect all GND pins to system analog ground
and tie this to digital ground. All unused input
pins must be grounded.
Corporation
SIGNAL PROCESSING EXCELLENCE
117
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