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HSD4M64D4B-10L 查看數據表(PDF) - Hanbit Electronics Co.,Ltd

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HSD4M64D4B-10L Datasheet PDF : 10 Pages
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HANBit
HSD4M64D4B
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
PARAMETER
SYMBOL
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
tRRD(min)
tRP(min)
tRP(min)
tRAS(min)
tRAS(max)
VERSION
-80
-10
-10L
16
20
20
20
20
20
20
20
20
48
50
50
100
UNIT NOTE
ns
1
ns
1
ns
1
ns
1
ns
Row cycle time
tRC(min)
68
70
70
ns
1
Last data in to row precharge
tRDL(min)
1
CLK
2
Last data in to new col. address delay
tCDL(min)
1
CLK
2
Last data in to burst stop
tBDL(min)
1
CLK
2
Col. address to col. address delay
tCCD(min)
1
CLK
3
Number of valid output data
CAS latency=3
CAS latency=2
2
ea
4
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
.
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
PARAMETER
SYMBO
-80
-10
-10L
L
MIN MAX MIN MAX MIN MAX
CLK cycle time CAS
latency=3
tCC
CAS
latency=2
8
10
10
1000
1000
10
10
12
1000
CLK to valid
CAS
6
6
6
output delay
latency=3
tSAC
CAS
6
6
7
latency=2
Output data
CAS
3
3
3
hold time
latency=3
tOH
CAS
3
3
3
latency=2
CLK high pulse width
tCH
3
3
3
URL:www.hbe.co.kr
-7-
REV.1.0 (August.2002)
UNIT
NOTE
ns
1
ns
1,2
ns
2
ns
3
HANBit Electronics Co.,Ltd

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