HT48RA5/HT48CA5
A.C. Characteristics
Symbol
Parameter
Test Conditions
VDD
Conditions
fSYS1
System Clock (Crystal OSC)
¾ 2.0V~5.5V
¾ 3.3V~5.5V
fSYS2
System Clock (RC OSC)
¾ 2.0V~5.5V
¾ 3.3V~5.5V
fTIMER
3V
Timer I/P Frequency (TMR0/TMR1)
50% duty
5V
Min.
400
400
400
400
0
0
3V
45
tWDTOSC Watchdog Oscillator Period
¾
5V
32
tWDT1
Watchdog Time-out Period
(WDT OSC)
3V
11
Without WDT prescaler
5V
8
tWDT2 Watchdog Time-out Period (fSYS/4) ¾ Without WDT prescaler ¾
tRES
External Reset Low Pulse Width
¾
¾
1
tSST
System Start-up Timer Period
¾
Power-up reset or
wake-up from HALT
¾
tLVR
Low Voltage Width to Reset
¾
¾
1
tINT
Interrupt Pulse Width
¾
¾
1
tACC
Data ROM Access Time
¾
¾
1
Note: tSYS=1/(fSYS)
Typ.
¾
¾
¾
¾
¾
¾
90
65
23
17
1024
¾
1024
¾
¾
¾
Ta=25°C
Max. Unit
4000 kHz
8000 kHz
4000 kHz
8000 kHz
4000 kHz
8000 kHz
180
ms
130
ms
46
ms
33
ms
¾
tSYS
¾
ms
¾
tSYS
¾
ms
¾
ms
¾
ms
Rev. 1.30
5
October 12, 2007