HUFA75631SK8T 查看數據表（PDF） - Fairchild Semiconductor
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HUFA75631SK8T Datasheet PDF : 11 Pages
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HUFA75631SK8
SABER Electrical Model
REV 29 July 1999
template HUFA75631sk8 n2,n1,n3
electrical n2,n1,n3
{
var i iscl
d..model dbodymod = (is = 1.02e-12, cjo = 1.49e-9, tt = 9.98e-8, m = 0.58)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 1.44e-9, is = 1e-30, m = 0.80 )
m..model mmedmod = (type=_n, vto = 3.04, kp = 1.75, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 3.47, kp = 40, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 2.71, kp = 0.08, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -5.5, voff = -4)
DPLCAP 5
10
sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -4, voff = -5.5)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -1, voff = 0)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0, voff = -1)
c.ca n12 n8 = 1.88e-9
RSLC2
RSLC1
51
ISCL
RDBREAK
72
c.cb n15 n14 = 1.88e-9
c.cin n6 n8 = 1.12e-9
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
l.ldrain n2 n5 = 1e-9
l.lgate n1 n9 = 1.12e-9
l.lsource n3 n7 = 1.29e-10
GATE
1
-
50
DBREAK
ESG
6
8
RDRAIN
+
EVTHRES
16
+ 19 - 21
LGATE
EVTEMP
8
RGATE + 18 - 6
9
20 22
MMED
RLGATE
MSTRO
CIN
8
11
MWEAK
EBREAK
+
17
18
-
7
LDRAIN
DRAIN
2
RLDRAIN
RDBODY
71
DBODY
LSOURCE
SOURCE
3
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
res.rbreak n17 n18 = 1, tc1 = 1.09e-3, tc2 = 0
res.rdbody n71 n5 = 5.39e-3, tc1 = 1.01e-3, tc2 = 9.97e-7
S1A
12 13
8
S1B
S2A
14
15
13
S2B
RSOURCE
RLSOURCE
RBREAK
17
18
RVTEMP
res.rdbreak n72 n5 = 3.03e-1, tc1 = 2.37e-3, tc2 = 0
res.rdrain n50 n16 = 1.86e-2, tc1 = 9.09e-3, tc2 = 2.74e-5
res.rgate n9 n20 = 1.88
res.rldrain n2 n5 = 10
CA
13
+
EGS
6
8
CB
+ 14
EDS
5
8
res.rlgate n1 n9 = 11.2
-
-
res.rlsource n3 n7 = 1.29
res.rslc1 n5 n51 = 1e-6, tc1 = 5.00e-3, tc2 = 0
res.rslc2 n5 n50 = 1e3
19
IT
-
VBAT
+
8
22
RVTHRES
res.rsource n8 n7 = 7.55e-3, tc1 = 1.00e-3, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -2.38e-3, tc2 = 1.39e-6
res.rvthres n22 n8 = 1, tc1 = -2.66e-3, tc2 = -1.01e-5
spe.ebreak n11 n7 n17 n18 = 114.8
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/76))** 2))
}
}
©2001 Fairchild Semiconductor Corporation
HUFA75631SK8 Rev. B
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