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HV230GA-G 查看數據表(PDF) - Supertex Inc

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HV230GA-G Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HV230/HV232
Truth Table
D0 D1 D2 D3 D4 D5 D6 D7 LE CL SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L L OFF
H
L L ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
L
LL
LL
ON
OFF
H
LL
ON
L
LL
H
LL
OFF
ON
L
LL
OFF
H
LL
ON
L
LL
OFF
H
LL
ON
L LL
OFF
HLL
ON
X XXX X XXX H L
HOLD PREVIOUS STATE
X X X X X X X X X H OFF OFF OFF OFF OFF OFF OFF OFF
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is
low the shift register data flows through the latch.
4. DOUT is high when data in shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is H.
6. The clear input overrides all other inputs.
Logic Timing Waveforms
DN + 1
DN
D
N-1
DATA
50%
50%
IN
LE
CLOCK
DATA
OUT
VOUT OFF
(TYP)
ON
50%
t SU
50%
t WLE
t SD
50%
th
t DD
50%
t OFF
90%
50%
t ON
10%
50%
CLR
50%
t WCL
5

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