HV6810WG-G 查看數據表（PDF） - Supertex Inc
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HV6810WG-G Datasheet PDF : 8 Pages
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Input and Output Equivalent Circuits
VDD
HV6810
VBB
Input
Output
VSS
Input Equivalent Circuit
Logic Data Output
VSS
Functional Block Diagram
Logic Diagram (positive logic)
Blanking
Latch Enable
Shift Register
Latches
Data Input
Clock
1D
R1
C2 LC1
Q1
C1
2D
1D
R2
C2 LC2
Q2
C1
2D
••• •••
6 Stages
•••
•••
(Q3 thru Q8)
not shown
1D
R9
C2 LC9
Q9
C1
2D
Function Table
Serial
Data
Input
H
Clock
Input
Shift Register
Contents
I1 I2 I3 ... IN-1 IN
H R1 R2 ... RN-2 RN-1
L
L R1 R2 ... RN-2 RN-1
X
R1 R2 R3 ... RN-1 RN
X X X ... X X
---
---
P1 P2 P3 ... PN-1 PN
---
1D R10
C1
C2 LC10
2D
Q10
Serial
Out
Serial
Data
Output
RN-1
RN-1
RN
X
PN
---
Strobe
Input
---
L
H
---
Latch Contents
I1 I2 I3 ... IN-1 IN
---
R1 R2 R3 ... RN-1 RN
P1 P2 P3 ... PN-1 PN
X X X ... X X
Blanking
Input
---
L
H
Output Contents
I1 I2 I3 ... IN-1 IN
---
P1 P2 P3 ... PN-1 PN
L L L ... L L
4
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