DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

HV9911 查看數據表(PDF) - Supertex Inc

零件编号
产品描述 (功能)
生产厂家
HV9911 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HV9911
an output short circuit condition will not remove the fault (Q1
is not in the path of the fault current). The disconnect switch
will help to disconnect the shorted load from the input.
Over Voltage Protection
Over voltage protection is achieved by connecting the output
voltage to the OVP pin through a resistive divider. The voltage
at the OVP pin is constantly compared to the internal 1.25V.
When the voltage at this pin exceeds 1.25V, the IC is turned
off and FAULT goes low.
Output Short Circuit Protection
The output short circuit condition is indicated by FAULT. At
startup, a monoshot circuit, (triggered by the POR circuit),
resets an internal flip-flop, which causes FAULT to go high,
and remains high during normal operation. This also allows
the gate drive to function normally.
The steady state current is reflected in the reference
voltage connected to the transconductance amplifier.
The instantaneous output current is sensed from the INV
terminal of the amplifier. The short circuit threshold current is
internally set to 200% of the steady state current.
During short circuit condition, when the current exceeds the
internally set threshold, the SR flip-flop is set and FAULT
goes low. At the same time, the gate driver of the power FET
is inhibited, providing a latching protection. The system can
be reset by cycling the input voltage to the IC.
Note: The short circuit FET should be connected before the
current sense resistor as reversing RS and Q2 will affect the
accuracy of the output current (due to the additional voltage
drop across Q2 which will be sensed).
When synchronized in this manner, a permanent HIGH
or LOW condition on the SYNC pin will result in a loss of
synchronization, but the HV9911 based converters will
continue to operate at their individually set operating
frequency. Since loss of synchronization will not result in total
system failure, the SYNC pin is considered fault tolerant.
Internal 1MHz Transconductance Amplifier
HV9911 includes a built in 1MHz transconductance amplifier,
with tri-state output, which can be used to close the feedback
loop. The output current sense signal is connected to the
FDBK pin and the current reference is connected to the IREF
pin.
The output of the opamp is controlled by the signal applied
to the PWMD pin. When PWMD is high, the output of the
opamp is connected to the COMP pin. When PWMD is low,
the output is left open. This enables the integrating capacitor
to hold the charge when the PWMD signal has turned off
the gate drive. When the IC is enabled, the voltage on the
integrating capacitor will force the converter into steady state
almost instantaneously.
The output of the opamp is buffered and connected to the
current sense comparator using a 15:1 divider. The buffer
helps to prevent the integrator capacitor from discharging
during the PWM dimming state.
Linear Dimming
Linear dimming can be accomplished by varying the voltage
at the IREF pin, as the output current is proportional to the
voltage at the IREF pin. This can be done either by using a
potentiometer from the REF pin or by applying an external
voltage source at the IREF pin.
Synchronization
The SYNC pin is an input/output (I/O) port to a fault tolerant
peer-to-peer and/or master clock synchronization circuit.
For synchronization, the SYNC pins of multiple HV9911
based converters can be connected together and may also
be connected to the open drain output of a master clock.
When connected in this manner, the oscillators will lock
to the device with the highest operating frequency. When
synchronizing multiple ICs, it is recommended that the same
timing resistor be (corresponding to the switching frequency)
be used in all the HV9911 circuits.
In rare occasions, given the length of the connecting lines for
the SYNC pins, a resistor between SYNC and GND may be
required to damp any ringing due to parasitic capacitances.
It is recommended that the resistor chosen be greater than
300kΩ.
Note that due to the offset voltage of the transconductance
opamp, pulling the IREF pin very close to GND will cause the
internal short circuit comparator to trigger and shut down the
IC. This limits the linear dimming range of the IC. However,
a 1:10 linear dimming range can be easily obtained. It is
recommended that the PWMD pin be used to get zero output
current rather than pull the IREF pin to GND.
PWM Dimming
PWM dimming can be achieved by driving the PWMD pin
with a TTL compatible square wave source. The PWM
signal is connected internally to the three different nodes
– the transconductance amplifier, the FAULT output, and the
GATE output.
When the PWMD signal is high, the GATE and FAULT pins
are enabled, and the output of the transconductance opamp
is connected to the external compensation network. Thus,
NR011206
8

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]