HV9982 查看數據表（PDF） - Supertex Inc

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HV9982

Three-Channel, Closed-Loop, Switch Mode LED Driver IC

Supertex Inc 

HV9982

Thus, the maximum COMP discharge time required can be

computed as:

tCOMP,max = max (tCOMP1, tCOMP2, tCOMP3)

The second is the time required for the inductors to com-

pletely discharge following a short circuit. This time can be

computed as:

tind,n =

π

4

Ln • Con

where L and CO are the input inductor and output capacitor

of each power stage.

Thus, the maximum time required to discharge the inductors

can be computed as:

tind,max = max (tind1, tind2, tind3)

The hiccup time is then chosen as:

thiccup > max (tCOMP,max, tind,max)

False Triggering of the Short Circuit Compara-

tor During PWM Dimming

During PWM dimming, the parasitic capacitance of the LED

string causes a spike in the output current when the discon-

nect FET is turned on. If this spike is detected by the short

circuit comparator, it will cause the IC to falsely detect an

over current condition and shut down.

Over Voltage Protection

The HV9982 provides hysteretic over voltage protection al-

lowing the IC to recover in case the LED load is momentarily

disconnected.

When the load is disconnected in a boost converter, the

output voltage rises as the output capacitor starts charging.

When the output voltage reaches the OVP rising threshold,

the HV9982 detects an over voltage condition and turns off

the converter. The converter is turned back on only when the

output voltage falls below the falling OVP threshold (which

is 10% lower than the rising threshold). This time is mostly

dictated by the R-C time constant of the output capacitor CO

and the resistor network used to sense over voltage (R +

OVP1

ROVP2). In case of a persistent open circuit condition, this cy-

cle keeps repeating maintaining the output voltage within a

10% band.

In most designs, the lower threshold voltage of the over volt-

age protection (V – 10%) at which point the HV9982 at-

OVP

tempts to restart will be more than the LED string voltage.

Thus, when the LED load is reconnected to the output of the

converter, the voltage differential between the actual output

voltage and the LED string voltage will cause a spike in the

output current. This causes a short circuit to be detected and

the HV9982 will trigger short circuit protection. This behavior

continues till the output voltage becomes lower than the LED

string voltage at which point, no fault will be detected and

normal operation of the circuit will commence.

Layout Considerations

In the HV9982, to prevent these false triggerings, there is

a built in 500ns blanking network for the short circuit com-

parator. This blanking network is activated when the PWMD

input goes high. Thus, the short circuit comparator will not

see the spike in the LED current during the PWM Dimming

turn-on transition. Once the blanking timer is completed, the

short circuit comparator will start monitoring the output cur-

rent. Thus, the total delay time for detecting a short circuit

will depend on the condition of the PWMD input.

If the output short circuit exists before the PWM dimming

signal goes high, the total detection time will be:

tdetect1 = tBLANK + tDELAY ≈ 950ns(max)

If the short circuit occurs when the PWM dimming signal is

already high, the time to detect will be:

tdetect1 = tDELAY ≈ 250ns(max)

For multi-channel peak current mode controller IC to work

properly with minimum interference between the channels,

it is important to have a good PCB layout which minimizes

noise. Following the layout rules stated below will help to

ensure proper performance of all three channels.

1. GND connection

The IC has four separate ground connections – one

for each of the three channels and one analog ground

for the common circuitry. It is recommended that four

separate ground planes be used in the PCB and all the

GND planes be connected together at the return termi-

nal of the input power lines.

2. VDD Connection

Each VDD pin should be by passed with a low ESR

capacitor to its OWN ground (i.e. VDD1 is bypassed

to GND1 and so on). The common VDD pin can be

bypassed to the common GND.

9

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