PC133-222-520 查看數據表（PDF） - Infineon Technologies

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PC133-222-520

3.3 V 16M x 64/72-Bit 1 Bank 128MByte SDRAM Module 3.3 V 32M x 64/72-Bit 2 Bank 256MByte SDRAM Module 168-Pin Unbuffered DIMM Modules

Infineon Technologies 

HYS 64/72V16300/32220GU

SDRAM-Modules

AC Characteristics 3), 4)

TA = 0 to 70 °C; VSS = 0 V; VDD = 3.3 V ±0.3 V, tT = 1 ns

Parameter

Symbol

Limit Values

Unit Note

-7

-7.5

-8

PC133-222 PC133-333 PC100-222

min. max. min. max. min. max.

Clock and Access Time

Clock Cycle Time

tCK

CAS Latency = 3

CAS Latency = 2

System Frequency

fCK

CAS Latency = 3

CAS Latency = 2

Clock Access Time

tAC

CAS Latency = 3

CAS Latency = 2

Clock High Pulse Width

tCH

Clock Low Pulse Width

tCL

Setup & Hold Parameters

Input Setup Time

tIS

Input Hold Time

tIH

Power Down Mode Entry

tSB

Time

Power Down Mode Exit

tPDE

Setup Time

Mode Register Setup Time tRSC

Transition Time (rise and fall) tT

Common Parameters

RAS to CAS Delay

tRCD

Precharge Time

tRP

Active Command Period

tRAS

Cycle Time

tRC

Bank-to-Bank Delay Time tRRD

7.5 –

7.5 –

10

7.5 –

10 –

10

–

133 –

133 –

–

133 –

100 –

–

5.4 –

5.4 –

–

5.4 –

6

–

2.5 –

2.5 –

3

2.5 –

2.5 –

3

–

–

ns

–

ns

–

100 MHz

100 MHz

4), 5)

6

ns

6

ns

–

ns

6)

–

ns

6)

1.5 –

1.5 –

2

–

ns

7)

0.8 –

0.8 –

1

–

ns

7)

–

1

–

1

–

1

CLK 8)

1

–

1

–

1

–

CLK 9)

2

–

2

–

2

–

CLK

1

–

1

–

1

–

ns –

15 –

20 –

20 –

ns –

15 –

20 –

20 –

ns –

42 100k 45 100k 50 100k ns –

60 –

67.5 –

70 –

ns –

14 –

15 –

16 –

ns –

INFINEON Technologies

9

9.01

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