DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

N74F50729D 查看數據表(PDF) - Philips Electronics

零件编号
产品描述 (功能)
生产厂家
N74F50729D Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Synchronizing dual D-type flip-flop with edge-triggered
set and reset and metastable immune characteristics
Product specification
74F50729
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
tsu (H)
tsu(L)
th (H)
th (L)
tw (H)
tw (L)
tw (L)
trec
trec
Setup time, high or low
Dn to CPn
Hold time, high or low
Dn to CPn
CPn pulse width,
high or low
SDn, RDn pulse width, low
Recovery time
SDn, RDn to CPn
Recovery time
SDn to RDn or RDn to SDn
TEST
CONDITION
Waveform 1
Waveform 1
Waveform 2
Waveform 3
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF,
RL = 500
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500
MIN
MAX
Tamb = –40°C to +85°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500
MIN
MAX
UNIT
1.5
1.5
2.0
2.0
2.0
2.0
ns
1.0
1.0
1.5
1.5
1.5
1.5
ns
3.0
4.0
3.5
6.0
3.5
6.0
ns
3.5
4.0
4.0
ns
Waveform 3 6.0
6.5
6.5
ns
Waveform 3 6.0
1.0
1.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Dn
VM
VM
VM
VM
tsu(L) th(L)
tsu(H) th(H)
1/fmax
CPn
VM
VM
tw(L)
VM
tw(H)
tPLH
tPHL
Qn
VM
VM
tPHL
tPLH
Qn
VM
VM
SF00049
Waveform 1. Propagation delay for data to output, data setup
time and hold times, and clock width, and
maximum clock frequency
SDn or RDn
CPn
VM
trec
VM
SF00603
Waveform 3. Recovery time for set or reset to output
tw(L)
SDn VM
VM
RDn
tPLH
tw(L)
VM
VM
tPHL
Qn
VM
tPHL
VM
tPLH
Qn
VM
VM
SF00050
Waveform 2. Propagation delay for set and reset to output,
set and reset pulse width
Qn, Qn
Qn, Qn
VM
tsk(o)
Waveform 4. Output skew
VM
SF00590
1990 Sep 14
8

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]