ICM7170MDG 查看數據表（PDF） - Intersil

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ICM7170MDG

Microprocessor-Compatible, Real-Time Clock

Intersil 

ICM7170

DC Electrical Specifications TA = -40oC to 85oC, VDD +5V ±10%, VBACKUP VDD, VSS = 0V Unless Otherwise Specified

All IDD specifications include all input and output leakages (ICM7170 and ICM7170A) (Contin-

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNITS

Leakage Current INTERRUPT, IOL(2)

Capacitance D0 - D7, CI/O

Capacitance A0 - A4,

CADDRESS

VO = VDD

INT SOURCE

-

0.5

10

µA

Connected to VSS

-

8

-

pF

-

6

-

pF

AC Electrical Specifications TA = -40oC to 85oC, VDD = +5V ± 10%, VBACKUP = VDD,

D0 - D7 Load Capacitance = 150pF, VIL = 0.4V, VlH = 2.8V, Unless Otherwise Specified

PARAMETER

MIN

MAX

UNITS

READ CYCLE TIMING

READ to DATA Valid, tRD

ADDRESS Valid to DATA Valid, tACC

READ Cycle Time, tCYC

Read High Time, tRH

RD High to Bus Three-State, tRH

ADDRESS to READ Set Up Time, tAS

ADDRESS HOLD Time After READ, tAR

WRITE CYCLE TIMING

-

250

ns

-

300

ns

400

-

ns

150

-

ns

-

25

ns

50

-

ns

0

-

ns

ADDRESS Valid to WRITE Strobe, tAD

ADDRESS Hold Time for WRITE, tWA

WRITE Pulse Width, Low, tWL

WRITE High Time, tWH

DATA IN to WRITE Set Up Time, tDW

DATA IN Hold Time After WRITE, tWD

WRITE Cycle Time, tCYC

MULTIPLEXED MODE TIMING

50

-

ns

0

-

ns

100

-

ns

300

-

ns

100

-

ns

30

-

ns

400

-

ns

ALE Pulse Width, High, tLL

ADDRESS to ALE Set Up Time, tAL

ADDRESS Hold Time After ALE, tLA

50

-

ns

30

-

ns

30

-

ns

12-8

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