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85301AGL

2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS85301

2:1

DIFFERENTIAL-TO-LVPECL MULTIPLEXER

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVCMOS LEVELS

Figure 1A shows an example of the differential input that

can be wired to accept single ended LVCMOS levels. The

reference voltage level VBB generated from the device is

connected to the negative input. The C1 capacitor should

be located as close as possible to the input pin.

VCC

Single Ended Clock Input

V_REF

C1

0.1u

R1

1K

PCLK

nPCLK

R2

1K

FIGURE 1A. SINGLE ENDED LVCMOS SIGNAL DRIVING DIFFERENTIAL INPUT

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVPECL LEVELS

Figure 1B shows an example of the differential input that reference voltage level VBB generated from the device is

can be wired to accept single ended LVPECL levels. The connected to the negative input.

VCC(or VDD)

CLK_IN

PCLK

VBB

nPCLK

85301AK

FIGURE 1B. SINGLE ENDED LVPECL SIGNAL DRIVING DIFFERENTIAL INPUT

www.icst.com/products/hiperclocks.html

8

REV. A JANUARY 16, 2006

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