ICS853014 查看數據表（PDF） - Integrated Circuit Systems

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ICS853014

LOW SKEW, 1-TO-5 2.5V/3.3V DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS853014

LOW SKEW, 1-TO-5

2.5V/3.3V DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER

TABLE 1. PIN DESCRIPTIONS

Number

Name

Type

Description

1, 2

Q0, nQ0 Output

Differential output pair. LVPECL / ECL interface levels.

3, 4

Q1, nQ1 Output

Differential output pair. LVPECL / ECL interface levels.

5, 6

Q2, nQ2 Output

Differential output pair. LVPECL / ECL interface levels.

7, 8

Q3, nQ3 Output

Differential output pair. LVPECL / ECL interface levels.

9, 10

Q4, nQ4 Output

Differential output pair. LVPECL / ECL interface levels.

11

VEE

Power

Negative supply pin.

Clock select input. When HIGH, selects CLK1, nCLK1 inputs.

12

CLK_SEL Input Pulldown When LOW, selects CLK0, nCLK0 inputs.

LVTTL / LVCMOS interface levels.

13

PCLK0

Input Pulldown Non-inverting differential LVPECL clock input.

14

nPCLK0

Input

Inverting differential LVPECL clock input. VCC/2 default when left floating.

15

VBB

Output

Bias voltage.

16

PCLK1

Input Pulldown Non-inverting differential LVPECL clock input.

17

nPCLK1 Input

Inverting differential LVPECL clock input. VCC/2 default when left floating.

18, 20

VCC

Power

Positive supply pins.

Synchronizing clock enable. When LOW, clock outputs follow clock input.

19

nEN

Input Pulldown When HIGH, Q outputs are forced low, nQ outputs are forced high.

LVTTL / LVCMOS interface levels.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

TABLE 2. PIN CHARACTERISTICS

Symbol

RPULLDOWN

RVCC/2

Parameter

Input Pulldown Resistor

Pullup/Pulldown Resistors

Test Conditions

Minimum

Typical

75

50

Maximum

Units

kΩ

kΩ

853014BG

www.icst.com/products/hiperclocks.html

2

REV. C MAY 13, 2005

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