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ICS87004 查看數據表(PDF) - Integrated Circuit Systems

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ICS87004 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
ICS87004
1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL
ZERO DELAY CLOCK GENERATOR
nCLK0,
nCLK1
CLK0,
CLK1
FB_IN
t (Ø)
VOH
VOL
VOH
VDDO
2
VOL
nCLK0,
nCLK1
CLK0,
CLK1
Q0:Q3
VDDO
2
t
PD
t(Ø) mean = Static Phase Offset
(where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
STATIC PHASE OFFSET
PROPAGATION DELAY
Q0:Q3
VDDO
2
t PW
VDDO
2
t PERIOD
odc = t PW
t PERIOD
VDDO
2
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
87004AG
www.icst.com/products/hiperclocks.html
8
REV. A JUNE 16, 2004

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