ICS85314-01 查看數據表（PDF） - Integrated Circuit Systems

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ICS85314-01

LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

PRELIMINARY

ICS85314-01

LOW SKEW, 1-TO-5

DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER

TABLE 4D. LVPECL DC CHARACTERISTICS, VCC = 2.375V TO 3.8V, VEE = 0V, TA = -40°C TO 85°C

Symbol Parameter

Test Conditions Minimum Typical

VOH

Output High Voltage; NOTE 1

VOL

Output Low Voltage; NOTE 1

VSWING Peak-to-Peak Output Voltage Swing

NOTE 1: Outputs terminated with 50Ω to VCC - 2V.

VCC - 1.4

VCC - 2.0

0.6

Maximum

VCC - 1.0

VCC - 1.7

1.0

Units

V

V

V

TABLE

5.

AC

CHARACTERISTICS,

V=

CC

2.375V

TO

3.8V,

V

EE

=

0V,

TA

=

-40°C

TO

85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

f

Output Frequency

MAX

CLK0, nCLK0;

tpLH

Propagation Delay,

Low to High

NOTE 1

CLK1; NOTE 2

IJ 650MHz

IJ 250MHz

1.0

1.0

650

MHz

2.1

ns

2.1

ns

tsk(o) Output Skew; NOTE 3, 5

50

ps

tsk(pp) Part-to-Part Skew; NOTE 4, 5

400

ps

tR

Output Rise Time

20% to 80% @ 50MHz

200

tF

Output Fall Time

20% to 80% @ 50MHz

200

CLK0, nCLK0

IJ 650MHz

45

odc

Output Duty Cycle

CLK1

IJ 250MHz

45

700

ps

700

ps

55

%

55

%

All parameters measured at 250MHz unless noted otherwise.

The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter

NOTE 1: Measured from the differential input crossing point to the differential output crossing point.

NOTE 2: Measured from VCC/2 input crossing point to the differential output crossing point.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltages

and with equal load conditions. Using the same type of inputs on each device, the outputs are measured

at the differential cross points.

NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.

85314AG-01

www.icst.com/products/hiperclocks.html

5

REV. B JUNE 21, 2002

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