ICS9148-32 查看數據表（PDF） - Integrated Circuit Systems
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ICS9148-32 Datasheet PDF : 14 Pages
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ICS9148-32
Serial Bitmap
Byte 3: Functionality & Frequency Select
& Sperad Select Register
Bit
Description
7
0: Center Spread ±0.255%
1: Down Spread 0 to -0.6%
SEL 100/66.6#
or Bit 6
Bits 5 4
CPU
MHz
0
00
68.5
0
01
75
6:4
0
0
10
83.3
11
66.6
1
00
103
1
01
112
1
10
133.3
1
11
100
0 - Frequency is selected by hardware select
3 SEL100166.6#
1 - Frequency is selected by 6:4 above
2
(Reserved)
00 - Normal operation
10
01 - Test mode
10 - Spread sprectrum ON
11 - Tristate all outputs
PCI
MHz
34.25
37.5
41.6
33.3
34.3
37.3
44.43
33.3
PWD
0
000
0
00
Byte 4:
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0 Bit Value = 1
7-
-
-
(Reserved) (Reserved)
6-
-
-
(Reserved) (Reserved)
5-
-
-
(Reserved) (Reserved)
4-
-
-
(Reserved) (Reserved)
3 35 CPUCLK3 1
Disabled
(low)
Enabled
2 36 CPUCLK2 1
Disabled
(low)
Enabled
1 39 CPUCLK1 1
Disabled
(low)
Enabled
0 40 CPUCLK0 1
(Disabled)
(low)
Enabled
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Note: PWD = Power-Up Default
6
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