ICS91730 查看數據表（PDF） - Integrated Circuit Systems

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ICS91730

Low EMI, Spread Modulating, Clock Generator

Integrated Circuit Systems 

ICS91730

Pin Descriptions

PIN #

1

2

3

4

5

6

7

PIN NAME

CLKIN

VDD

GND

CLKOUT

REF_OUT/FS_IN1*

SDATA

SCLK

PIN

TYPE

PWR

IN

OUT

I/O

I/O

PWR

PWR

DESCRIPTION

Input for reference clock.

Power supply, nominal 3.3V

Ground pin.

Modulated clock output.

Un-modulated 3.3V reference clock output.

Frequency select latch input. Refer to the functionality table.

Data pin for SMBus circuitry, 5V tolerant.

Clock pin of SMBus circuitry, 5V tolerant.

8

PD#*

Asynchronous active low input pin, with 120Kohm internal pull-up resistor,

PWR used to power down the device. The internal clocks are disabled and the

VCO and the crystal are stopped.

* Internal Pull-Up Resistor ** Internal Pull-Down Resistor

0794D—05/23/05

2

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