ICS9248YF-50-T(2003) 查看數據表（PDF） - Integrated Circuit Systems

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ICS9248YF-50-T
(Rev.:2003)

Frequency Timing Generator for Pentium II Systems

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS9248-50

Frequency Timing Generator for Pentium II Systems

General Description

The ICS9248-50

Block Diagram

ICS9248-50

Features

• Generates the following system clocks:

- 2 CPU (2.5V) up to 100MHz.

- 6 PCI (3.3V) @ 33.3MHz (Includes one free

running).

- 2 REF clks (3.3V) at 14.318MHz.

• Skew characteristics:

- CPU – CPU<175ps

- PCI – PCI < 500ps

- CPU(early) – PCI = 1.5ns – 4ns.

• Supports Spread Spectrum modulation for CPU and

PCI clocks, 0.5% down spread

• Efficient Power management scheme through stop

clocks and power down modes.

• Uses external 14.318MHz crystal, no external load

cap required for CL=18pF crystal.

• 28-pin (209 mil) SSOP package

Pin Configuration

Power Groups

0278I—06/03/03

28-Pin SSOP

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