IDT54FCT16601AT 查看數據表（PDF） - Integrated Device Technology
零件编号
产品描述 (功能)
生产厂家
IDT54FCT16601AT
Integrated Device Technology
IDT54FCT16601AT Datasheet PDF : 7 Pages
| |||
IDT74FCT16601AT/CT/ET, 162601AT/CT/ET
FAST CMOS 18-BIT UNIVERSAL BUS TRANSCEIVERS
COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
Parameter
Condition(1)
fMAX CLKAB or CLKBA frequency(4)
CL = 50pF
tPLH Propagation Delay
tPHL Ax to Bx or Bx to Ax
tPLH Propagation Delay
tPHL LEBA to Ax, LEAB to Bx
RL = 500Ω
tPLH Propagation Delay
tPHL CLKBA to Ax, CLKAB to Bx
tPZH Output Enable Time
tPZL OEBA to Ax, OEAB to Bx
tPHZ Output Disable Time
tPLZ OEBA to Ax, OEAB to Bx
tSU Set-up Time, HIGH or LOW
Ax to CLKAB, Bx to CLKBA
tH Hold Time HIGH or LOW
Ax after CLKAB, Bx after CLKBA
tSU Set-up Time HIGH or LOW Clock LOW
FCT16601AT/
FCT162601AT
Min.(2)
Max.
—
150
1.5
4.9
1.5
5.2
1.5
4.7
1.5
5.8
1.5
6.2
4.0
—
0
—
1.0
—
FCT16601CT/
FCT162601CT
Min.(2)
Max.
—
150
1.5
4.4
1.5
4.7
1.5
4.5
1.5
5.3
1.5
5.7
3.0
—
0
—
1.0
—
FCT16601ET/
FCT162601ET
Min.(2)
Max.
—
150
1.5
3.8
Unit
MHz
ns
1.5
4.2 ns
1.5
4.2 ns
1.5
4.8 ns
1.5
5.2 ns
2.4
—
ns
0
—
ns
1.0
—
ns
Ax to LEAB, Bx to LEBA Clock HIGH
2.5
—
2.0
—
1.5
—
ns
tH Hold Time, HIGH or LOW
Ax after LEAB, Bx after LEBA
tSU Set-up Time, CLKEN to CLK
tH Hold Time, CKLEN after CLK
2.0
—
1.5
—
0.5
—
ns
2.5
—
2.5
—
2.0
—
ns
0
—
0
—
0
—
ns
tW LEAB or LEBA Pulse Width
HIGH(4)
2.5
—
2.5
—
2.5
tW CLKAB or CLKBA Pulse Width
HIGH or LOW(4)
tSK(o) Output Skew(3)
3.0
—
3.0
—
3.0
—
0.5
—
0.5
—
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
—
ns
—
ns
0.5 ns
3247 tbl 09
5.9
5
Share Link: