IDT7006S17FB 查看數據表（PDF） - Integrated Device Technology

零件编号

产品描述 (功能)

生产厂家

IDT7006S17FB

HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7006S/L

HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TIMING WAVEFORM OF SEMAPHORE READ AFTER WRITE TIMING, EITHER SIDE(1)

A0-A2

SEM

I/O

R/W

OE

VALID ADDRESS

tAW

tWR

tEW

tDW

DATAIN

VALID

tAS

tWP

tDH

tSAA

tOH

VALID ADDRESS

tACE

tSOP

DATAOUT

VALID(2)

tSWRD

tAOE

Write Cycle

Read Cycle

2739 drw 11

NOTES:

1. CE = VIH for the duration of the above timing (both write and read cycle).

2. "DATAOUT VALID" represents all I/O's (I/O0-I/O7) equal to the semaphore value.

TIMING WAVEFORM OF SEMAPHORE WRITE CONTENTION(1,3,4)

A0"A"-A2"A"

MATCH

SIDE(2) “A”

W R/ "A"

SEM"A"

A0"B"-A2"B"

SIDE(2) “B”

W R/ "B"

MATCH

tSPS

SEM"B"

2739 drw 12

NOTES:

1. DOR = DOL = VIL, CER = CEL = VIH, Semaphore Flag is released from both sides (reads as ones from both sides) at cycle start.

2. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.

3. This parameter is measured from W R/ "A" or SEM"A" going High to W R/ "B" or SEM"B" going High.

4. If tSPS is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will obtain the flag.

6.07

11

Share Link: