IDT82V2048L 查看數據表（PDF） - Integrated Device Technology

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IDT82V2048L

OCTAL T1/E1 SHORT HAUL ANALOG FRONT END

Integrated Device Technology 

IDT82V2048L OCTAL T1/E1 SHORT HAUL ANALOG FRONT END

1 PIN DESCRIPTION

INDUSTRIAL TEMPERATURE RANGES

Table-1 Pin Description

Name

Type

TTIP0

TTIP1

TTIP2

TTIP3

TTIP4

TTIP5

TTIP6

TTIP7

TRING0

TRING1

TRING2

TRING3

TRING4

TRING5

TRING6

TRING7

RTIP0

RTIP1

RTIP2

RTIP3

RTIP4

RTIP5

RTIP6

RTIP7

RRING0

RRING1

RRING2

RRING3

RRING4

RRING5

RRING6

RRING7

Analog

Output

Analog

Input

Pin No.

TQFP144 PBGA160

Description

Transmit and Receive Line Interface

45

N5

52

L5

57

L10

64

N10

117

B10

124

D10

129

D5 TTIPn/TRINGn: Transmit Bipolar Tip/Ring for Channel 0~7

136

B5 These pins are the differential line driver outputs. They will be in high impedance state if pin OE is low or

the corresponding pin TCLKn is low (pin OE is global control, while pin TCLKn is per-channel control). In

46

P5 host mode, each pin can be in high impedance by programming a ‘1’ to the corresponding bit in register

51

M5

OE(1).

58

M10

63

P10

118

A10

123

C10

130

C5

135

A5

48

P7

55

M7

60

M8

67

P8

120

A8

127

C8

132

C7

139

A7

RTIPn/RRINGn: Receive Bipolar Tip/Ring for Channel 0~7

49

N7

These pins are the differential line receiver inputs.

54

L7

61

L8

66

N8

121

B8

126

D8

133

D7

138

B7

1. Register name is indicated by bold capital letter. For example, OE indicates Output Enable Register.

4

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