INTEGRAL
CHARACTERISTICS Vp = 3 V; f = 1 kHz; RL = 32 0., Tamb = 25 °C; unless otherwise specified
PARAMETER
SYMBOL MIN.
TYP.
MAX. UNIT
Supply
Supply voltage
Total quiescent current
Bridge-tied load application (BTL); see Fig.4
Output power; note 1
Vp = 3,0 V; diet = 10%
Vp = 4,5 V; diet = 10% (RL = 64 Q)
Voltage gain
Noise output voltage (r.m.s. value)
RS = 5 kQ.-, f = 1 kHz
RS = 0 Q; f = 500 kHz; B =5 kHz
D.C. output offset voltage (at Rs = 5 kΩ)
Input impedance (at Rs =∞)
Input bias current
Stereo application;
Output power; note 1
Vp=3,OV;dtot=10%
Vp=4,5V;dtot=10%
Voltage gain
Noise output voltage (r.m.s. value)
RS = 5 kΩ; f = 1 kHz
RS = 0 Ω; f = 500 kHz; B =5 kHz
Channel separation
RS = 0 Ω; f = 1 kHz
Input impedance (at Rs = ∞)
Input bias current
Vp
1,6
Itot
-
-
6,0
V
3,2
4
mA
PO
-
PO
-
GV
-
Vno(rms) -
Vno(rms) -
l∆VI
-
IZiI
1
Ii
-
140
-
mW
150
-
mW
32
-
dB
140
-
mV
tbf
-
mV
-
70
mV
-
-
MΩ
40
-
nA
PO
-
PO
-
GV
24.5
Vno(rms) -
Vno(rms) -
K
30
IZjl
2
Ii
-
35
-
mW
75
-
mW
26
27.5
dB
100
-
mV
tbf
-
mV
40
-
dB
-
-
MΩ
20
-
nA
Note
1. Output power is measured directly at the output pins of the IC. It is shown as a function of the supply voltage in Fig.2
(BTL application) and Fig.3 (stereo application).
Àpplication diagram (BTL)
Àpplication diagram (stereo)