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IMP705 查看數據表(PDF) - IMP, Inc

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IMP705 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
IMP705/6/7/8, 813L
Application Information
Ensuring That RESET is Valid Down to VCC = 0V
When VCC falls below 1.1V, the IMP705-708 RESET output no
longer pulls down; it becomes indeterminate. To avoid the possi-
bility that stray charges build up and force RESET to the wrong
state, a pull-down resistor should be connected to the RESET pin,
thus draining such charges to ground and holding RESET
low. The resistor value is not critical. A 100kresistor will pull
RESET to ground without loading it.
Bi-directional Reset Pin Interfacing
The IMP705/6/7/8 can interface with µP/µC bi-directional reset
pins by connecting a 4.7kresistor in series with the RESET
output and the µP/µC bi-directional RESET pin.
BUF
Buffered
RESET
VCC < 1.1V
VCC
VCC
IMP70x
RESET
GND
100k9
705_06.eps
Power
Supply
IMP70x
4.7k
RESET
µC or µP
RESET
Input
GND
GND
Bi-directional I/O Pin
(Example: 68HC11)
705_08.eps
Figure 3. Ensuring That RESET is Valid Down to VCC = 0V
Figure 3. Bi-directional Reset Pin Interfacing
6
408-432-9100/www.impweb.com
© 1999 IMP, Inc.

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