IN74ACT192 查看數據表（PDF） - Integral Corp.

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IN74ACT192

PRESETTABLE BCD/DECADE UP/DOWN COUNTER High-Speed Silicon-Gate CMOS

Integral Corp. 

IN74ACT192

AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)

Guaranteed Limits

Symbol

Parameter

25 °C

-40°C to

Unit

85°C

Min Max Min Max

fmax Maximum Clock Frequency (Figure 1)

100

80

MHz

tPLH Propagation Delay, CPU or to TCU or

15

16.5 ns

TC D (Figure 2)

tPHL Propagation Delay, CPU or CPD to TCU or

14

15.5 ns

TC D (Figure 2)

tPLH Propagation Delay, CPU or CPD to Qn

(Figure 1)

12

13.5 ns

tPHL Propagation Delay, CPU or CPD to Qn

(Figure 1)

12

13.5 ns

tPLH Propagation Delay, Pn to Qn (Figure 3)

tPHL Propagation Delay, Pn to Qn (Figure 3)

tPLH Propagation Delay, PL to Qn (Figure 4)

tPHL Propagation Delay, PL to Qn (Figure 4)

tPHL Propagation Delay, MR to Qn (Figure 5)

tPLH Propagation Delay, MR to TCU (Figure 6)

12

13.5 ns

12

13.5 ns

12

13.5 ns

15

16.5 ns

15

16.5 ns

14

15.5 ns

tPHL Propagation Delay, MR to TC D (Figure 6)

14

15.5 ns

tPLH Propagation Delay, PL to TCU or TC D

15

16.5 ns

(Figure 6)

tPHL Propagation Delay, PL to TCU or TC D

(Figure 6)

11

12.5 ns

tPLH Propagation Delay, Pn to TCU or TC D

(Figure 6)

15

16.5 ns

tPHL Propagation Delay, Pn to TCU or TC D

(Figure 6)

15

16.5 ns

CIN Maximum Input Capacitance

4.5

4.5

pF

CPD Power Dissipation Capacitance

Typical @25°C,VCC=5.0

V

45

pF

4

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