SIHF740-E3 查看數據表（PDF） - Vishay Semiconductors
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SIHF740-E3 Datasheet PDF : 9 Pages
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IRF740, SiHF740
Vishay Siliconix
VDS
Vary tp to obtain
required IAS
RG
10 V
tp
L
D.U.T
IAS
0.01 Ω
+
- VDD
Fig. 12a - Unclamped Inductive Test Circuit
VDS
VDS
tp
VDD
IAS
Fig. 12b - Unclamped Inductive Waveforms
1200
1000
800
Top
Bottom
ID
4.5 A
5.3 A
10 A
600
400
200
0 VDD = 50 V
25
50
75
100
125
150
91054_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
10 V
QGS
VG
QG
QGD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
+
D.U.T. - VDS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
www.vishay.com
6
Document Number: 91054
S11-0507-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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