DS1992L-F5 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS1992L-F5

1kb/4kb Memory iButton

Dallas Semiconductor -> Maxim Integrated 

DS1992/DS1993

slave(s). The presence pulse lets the bus master know that the DS199_ is on the bus and is ready to

operate. For more details, see the 1-Wire Signaling section.

ROM FUNCTION COMMANDS

Once the bus master has detected a presence, it can issue one of the four ROM function commands. All

ROM function commands are 8 bits long. A list of these commands follows (see the flow chart in Figure

9).

Read ROM [33h]

This command allows the bus master to read the DS199_’s 8-bit family code, unique 48-bit serial

number, and 8-bit CRC. This command should only be used if there is a single DS199_ on the bus. If

more than one slave is present on the bus, a data collision occurs when all slaves try to transmit at the

same time (open drain produces a wired-AND result). The resultant family code and 48-bit serial number

usually result in a mismatch of the CRC.

Match ROM [55h]

The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a

specific DS199_ on a multidrop bus. Only the DS199_ that exactly matches the 64-bit ROM sequence

will respond to the following memory function command. All slaves that do not match the 64-bit ROM

sequence wait for a reset pulse. This command can be used with single or multiple devices on the bus.

Skip ROM [CCh]

This command can save time in a single drop bus system by allowing the bus master to access the

memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus

and, for example, a read command is issued following the Skip ROM command, data collision will occur

on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired-AND

result).

Search ROM [F0h]

When a system is initially brought up, the bus master may not know the number of devices on the 1-Wire

bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process of

elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process is

the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the desired

value of that bit. The bus master performs this simple, 3-step routine on each bit of the ROM. After one

complete pass, the bus master knows the 64-bit ROM code of one device. Additional passes will identify

the ROM codes of the remaining devices. See Chapter 5 of the Book of DS19xx iButton Standards for a

comprehensive discussion of a search ROM, including an actual example.

1-WIRE SIGNALING

The DS199_ require strict protocols to ensure data integrity. The protocol consists of four types of

signaling on one line: reset sequence with reset pulse and presence pulse, write 0, write 1, and read data.

The bus master initiates all these signals except presence pulse. The initialization sequence required to

begin any communication with the DS199_ is shown in Figure 10. A reset pulse followed by a presence

pulse indicates the DS199_ is ready to send or receive data given the correct ROM command and

memory function command. The bus master transmits (Tx) a reset pulse (tRSTL, minimum 480ms). The bus

master then releases the line and goes into receive mode (Rx). The 1-Wire bus is pulled to a high state

through the pullup resistor. After detecting the rising edge on the data line, the DS199_ waits (tPDH, 15ms

to 60ms) and then transmits the presence pulse (tPDL, 60ms to 240ms).

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