IRS20955PBF 查看數據表（PDF） - International Rectifier
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IRS20955PBF Datasheet PDF : 21 Pages
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IRS20955(S)PbF
PRELIMINARY
Electrical Characteristics
VCC ,VBS= 12 V, IDD=5 mA, VSS=20 V, VS=0 V,CL=1 nF and TA=25 °C unless otherwise specified.
Symbol Definition
Low-Side Supply
UVCC+
UVCC-
IQCC
VCLAMPL
VCC supply UVLO positive threshold
VCC supply UVLO negative threshold
Low-side quiescent current
Low-side Zener diode clamp voltage
High-Side Floating Supply
UVBS+ High-side well UVLO positive
threshold
UVBS-
High-side well UVLO negative
threshold
IQBS
ILKH
VCLAMPH
High-side quiescent current
High-side to low-side leakage current
High-side Zener diode clamp voltage
Floating Input Supply
UVDD+
VDD, VSS floating supply UVLO
positive threshold
UVDD-
VDD, VSS floating supply UVLO
negative threshold
IQDD
VCLAMPM
Floating input quiescent current
Floating input Zener diode clamp
voltage
ILKM Floating input side to low-side leakage
current
Floating PWM Input
VIH
Logic high input threshold voltage
VIL
Logic low input threshold voltage
IIN+
Logic “1” input bias current
IIN-
Logic “0” input bias current
Min
8.4
8.2
-
19.6
8.0
7.8
-
-
19.6
8.2
7.7
-
9.8
-
2.3
-
-
-
Typ
8.9
8.7
-
20.4
8.5
8.3
-
-
20.4
8.7
8.2
-
10.2
-
1.9
1.9
-
-
Max
9.4
9.2
3
21.6
9.0
8.8
1
50
21.6
9.2
8.7
1
10.8
50
-
1.5
40
1
Units Test Conditions
V
mA
VDT = VCC
V
ICC=5 mA
V
mA
µA
VB=VS =200 V
V
IBS=5 mA
VSS =0 V
V
VSS =0 V
mA
VDD=9.5 V +VSS
V
IDD=5 mA
µA
VDD=VSS =200 V
V
µA
VIN =3.3 V
VIN = VSS
Protection
VREF
Vth,OCL
Reference output voltage
Low-side OC threshold in Vs
4.8
5.1
5.4
1.1
1.2
1.3
IOREF =0.5 mA
OCSET=1.2 V,
Fig. 3
Vth,OCH High-side OC threshold in VCSH
1.1+ VS 1.2+ VS
1.3+ VS
V
VS=200 V,
Fig. 4
Vth,1 CSD pin shutdown release threshold 0.62 x VDD 0.70 x VDD 0.78 x VDD
Vth,2 CSD pin self reset threshold
0.26 x VDD 0.30 x VDD 0.34 x VDD
VSS =0 V
ICSD+
ICSD-
tSD
CSD pin discharge current
CSD pin charge current
Shutdown propagation delay from
VCSD > VSS + Vth,OCH to shutdown
70
100
70
100
130
130
µA
VSD = VSS +5 V
-
-
250
Fig. 2
tOCH
Propagation delay time from VCSH >
Vth,OCH to shutdown
-
-
500
ns
Fig. 4
tOCL
Propagation delay time from Vs>
Vth,OCL to shutdown
-
-
500
Fig. 3
Gate Driver
Io+
Output high short circuit current
(source)
-
1.0
-
A
VO =0 V, PW<10 µs
Io-
Output low short circuit current (sink)
-
VOL
Low level output voltage
LO – COM, HO – VS
-
1.2
-
VO =12 V, PW<10 µs
-
0.1
V
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