IS25C16 查看數據表（PDF） - Integrated Silicon Solution

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IS25C16

8K-BIT/16K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS25C08

IS25C16

SERIAL INTERFACE DESCRIPTION

MASTER: The device that provides a clock signal.

SLAVE: The IS25C08/16 is a slave because the clock

signal is an input.

TRANSMITTER/RECEIVER: The IS25C08/16 has both

data input (SI) and data output (SO).

MSB: The most significant bit. It is always the first bit

transmitted or received.

OP-CODE: The first byte transmitted to the slave

following CS transition to LOW. If the OP-CODE is a

valid member of the IS25C08/16 instruction set (Table 3),

then it is decoded appropriately. If the OP-CODE is not

valid, and the SO pin remains in high impedance.

ISSI ®

BLOCK DIAGRAM

STATUS

REGISTER

VCC

GND

1024 x 8/2048 x 8

MEMORY ARRAY

DATA

REGISTER

SI

ADDRESS

DECODER

OUTPUT

BUFFER

MODE

CS

DECODE

LOGIC

WP

SCK

CLOCK

SO

HOLD

Integrated Silicon Solution, Inc. — 1-800-379-4774

3

Preliminary Information Rev. 00H

02/23/06

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