IS25LQ040-JPLE(2012) 查看數據表（PDF） - Integrated Silicon Solution

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IS25LQ040-JPLE
(Rev.:2012)

4 Mbit Single Operating Voltage Serial Flash Memory With 104 MHz Dual- or 100MHz Quad-Output SPI Bus Interface

Integrated Silicon Solution 

IS25LQ040

DEVICE OPERATION (CONTINUED)

WRITE ENABLE OPERATION

The Write Enable (WREN) instruction is used to set the erase, page program, write status register, and write

Write Enable Latch (WEL) bit. The WEL bit of the

configuration register operations. The WEL bit will be

IS25LQ016 is reset to the write –protected state after reset to the write-protect state automatically upon

power-up. The WEL bit must be write enabled before completion of a write operation. The WREN instruction

any write operation, including sector, block erase, chip is required before any above operation is executed.

Figure 6. Write Enable Sequence

WRDI COMMAND (WRITE DISABLE) OPERATION

The Write Disable (WRDI) instruction resets the WEL instruction is not required after the execution of a write

bit and disables all write instructions. The WRDI

instruction, since the WEL bit is automatically reset.

Figure 7. Write Disable Sequence

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

15

09/13/2012

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