IS61NLP102418-200B3 查看數據表（PDF） - Integrated Silicon Solution

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IS61NLP102418-200B3

256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE 'NO WAIT' STATE BUS SRAM

Integrated Silicon Solution 

IS61NLP25672/IS61NVP25672

IS61NLP51236/IS61NVP51236

IS61NLP102418/IS61NVP102418

ISSI ®

WRITE TRUTH TABLE (x72)

Operation

WE BWa BWb BWc BWd

READ

H

X

X

X

X

WRITE BYTE a

L

L

H

H

H

WRITE BYTE b

L

H

L

H

H

WRITE BYTE c

L

H

H

L

H

WRITE BYTE d

L

H

H

H

L

WRITE BYTE e

L

H

H

H

H

WRITE BYTE f

L

H

H

H

H

WRITE BYTE g

L

H

H

H

H

WRITE BYTE h

L

H

H

H

H

WRITE ALL BYTEs

L

L

L

L

L

WRITE ABORT/NOP

L

H

H

H

H

Notes:

1. X means "Don't Care".

2. All inputs in this table must beet setup and hold time around the rising edge of CLK.

BWe

X

H

H

H

H

L

H

H

H

L

H

BWf

X

H

H

H

H

H

L

H

H

L

H

BWg

X

H

H

H

H

H

H

L

H

L

H

BWh

X

H

H

H

H

H

H

H

L

L

H

INTERLEAVED BURST ADDRESS TABLE (MODE = VDD or NC)

External Address

A1 A0

00

01

10

11

1st Burst Address

A1 A0

01

00

11

10

2nd Burst Address

A1 A0

10

11

00

01

3rd Burst Address

A1 A0

11

10

01

00

10

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. G

07/10/06

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