ISL6232 查看數據表（PDF） - Intersil
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ISL6232 Datasheet PDF : 25 Pages
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ISL6232
Typical Operating Performance Circuit in Figure 29, no load on LDO5, LDO3, OUT3 OUT5, and REF, VIN = 12V,
EN3 = EN5 = VCC, SHDN# = VIN, TA = 25°C, unless otherwise noted.
100
90
80 7V-SKIP
70
60
50
40
30
20
10
0
0.001
12V-SKIP
25V-SKIP
7V-PWM
12V-PWM
25V-PWM
0.010
0.100
1.000
3.3V OUTPUT LOAD (A)
10.000
FIGURE 1. EFFICIENCY OF 3.3V OUTOUT vs LOAD
(7V, 12V, 25V-PWM, SKIP)
100
90
80
70
60
50
40
30
20
10
0
0.001
7V-ULTRA SKIP
12V-ULTRA SKIP
25V-ULTRA SKIP
0.010
0.100
1.000
3.3V OUTPUT LOAD (A)
10.000
FIGURE 2. EFFICIENCY OF 3.3V OUTPUT vs LOAD
(7V, 12V, 25V-ULTRA SKIP)
350
300
250
200 7V-PWM
150
7V-ULTRA SKIP
100
7V-SKIP
50
0
0.001
0.010
0.100
1.000
10.000
3.3V OUTPUT LOAD (A)
100.000
FIGURE 3. FREQUENCY OF 3.3V OUTPUT vs LOAD
(7V-PWM, SKIP, ULTRA SKIP)
350
300
250
200 25V-PWM
150
25V-ULTRA SKIP
100
25V-SKIP
50
0
0.001
0.010
0.100
1.000
3.3V OUTPUT LOAD (A)
10.000
FIGURE 5. FREQUENCY OF 3.3V OUTPUT vs LOAD
(25V-PWM, SKIP, ULTRA SKIP)
6
350
300
250
200 12V-PWM
150
12V-ULTRA SKIP
100
50
12V-SKIP
0
0.001
0.010
0.100
1.000
3.3V OUTPUT LOAD (A)
10.000
FIGURE 4. FREQUENCY OF 3.3V OUTPUT vs LOAD
(12V-PWM, SKIP, ULTRA SKIP)
3.34
12V-ULTRA SKIP
3.32
3.30
3.28
12V-PWM
3.26
12V-SKIP
3.24
3.22
3.20
0.001
0.010
0.100
1.000
3.3V OUTPUT LOAD (A)
10.000
FIGURE 6. OUTPUT VOLTAGE REGULATION OF 3.3V vs
LOAD (12V-PWM, SKIP, ULTRA SKIP)
FN9116.0
April 18, 2005
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