ISP1105 查看數據表（PDF） - Philips Electronics
零件编号
产品描述 (功能)
生产厂家
ISP1105 Datasheet PDF : 24 Pages
| |||
Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
6.2 Pin description
Table 3: Pin description
Symbol[1] Pin
Type
ISP1105 ISP1106/7 ISP1106/7
HBCC16 HBCC16 TSSOP16
OE
1
1
3
I
RCV
2
2
4
O
VP
3
3
5
O
VM
4
4
6
O
SUSPND 5
5
7
I
MODE
6
I
GND
-[2]
6
8
-
VCC(I/O)
7
7
9
-
SPEED
8
8
10
I
D−
9
9
11
AI/O
D+
10
10
12
AI/O
VPO/VO 11
11
13
I
VMO/FSE0 12
12
14
I
Description
input for output enable (CMOS level with respect to VCC(I/O),
active LOW); enables the transceiver to transmit data on
the USB bus
differential data receiver output (CMOS level with respect to
VCC(I/O)); driven LOW when input SUSPND is HIGH; the
output state of RCV is preserved and stable during an SE0
condition
single-ended D+ receiver output (CMOS level with respect
to VCC(I/O)); for external detection of single-ended zero
(SE0), error conditions, speed of connected device; driven
HIGH when no supply voltage is connected to VCC(5.0) and
Vreg(3.3)
single-ended D− receiver output (CMOS level with respect
to VCC(I/O)); for external detection of single-ended zero
(SE0), error conditions, speed of connected device; driven
HIGH when no supply voltage is connected to VCC(5.0) and
Vreg(3.3)
suspend input (CMOS level with respect to VCC(I/O)); a
HIGH level enables low-power state while the USB bus is
inactive and drives output RCV to a LOW level
mode input (CMOS level with respect to VCC(I/O)); a HIGH
level enables the differential input mode (VPO, VMO)
whereas a LOW level enables a single-ended input mode
(VO, FSE0). see Table 5 and Table 6
ground supply
supply voltage for digital I/O pins (1.65 to 3.6 V). When
VCC(I/O) is not connected, the (D+, D−) pins are in
three-state. This supply pin is totally independent of
VCC(5.0) and Vreg(3.3) and must never exceed the Vreg(3.3)
voltage.
speed selection input (CMOS level with respect to VCC(I/O));
adjusts the slew rate of differential data outputs D+ and D−
according to the transmission speed:
LOW: low-speed (1.5 Mbit/s)
HIGH: full-speed (12 Mbit/s)
negative USB data bus connection (analog, differential); for
low-speed mode connect to pin Vpu(3.3) via a 1.5 kΩ resistor
positive USB data bus connection (analog, differential); for
full-speed mode connect to pin Vpu(3.3) via a 1.5 kΩ resistor
driver data input (CMOS level with respect to VCC(I/O),
Schmitt trigger); see Table 5 and Table 6
driver data input (CMOS level with respect to VCC(I/O),
Schmitt trigger); see Table 5 and Table 6
9397 750 08872
Product data
Rev. 06 — 30 November 2001
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
5 of 24
Share Link: 