SCN26562C4A52 查看數據表（PDF） - Philips Electronics
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SCN26562C4A52 Datasheet PDF : 17 Pages
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Philips Semiconductors
Dual universal serial communications controller (DUSCC)
Product specification
SCN26562
BLOCK DIAGRAM
D0–D7
BUS
BUFFER
RDYN
WRN
RDN
A1–A6
CEN
RESETN
RTxDRQAN/GPO1AN
RTxDRQBN/GPO1BN
TxDRQAN/GPO2AN
TxDRQBN/GPO2BN
RTxDAKAN/GPI1AN
RTxDAKBN/GPI1BN
TxDAKAN/GPI2AN
TxDAKBN/GPI2BN
EOPN
MPU
INTERFACE
DMA
INTERFACE
INTERFACE/
OPERATION
CONTROL
ADDRESS
DECODE
R/W
DECODE
DMA
CONTROL
CCRA/B
PCRA/B
RSRA/B
TRSRA/B
ICTSRA/B
GSR
CMR1A/B
CMR2A/B
OMRA/B
TRxCA/B
RTxCA/B
CTSAN/LCAN
CTSBN/LCBN
DCDBN/SYNIBN
DCDAN/SYNIAN
RTSBN/SYNOUTBN
RTSAN/SYNOUTAN
IRQN
IACKN
X1/CLK
X2
SPECIAL
FUNCTION
PINS
INTERRUPT
CONTROL
ICRA/B
IERA/B
IVR
IVRM
OSCILLATOR
DUSCC
LOGIC
Figure 2. Block Diagram
CHANNEL
MODE AND
TIMING A/B
DPLL CLK
MUX A/B
DPLLA/B
BRG
COUNTER
TIMER A/B
C/T CLK
MUX A/B
CTCRA/B
CTPRHA/B
CTPRLA/B
CTHA/B
CTLA/B
TRANSMIT
A/B
TRANS CLK
MUX
TPRA/B
TTRA/B
TX SHIFT
REG
TRANSMIT
4 DEEP
FIFO
CRC
GENERATOR
SPEC CHAR
GEN LOGIC
TxD A/B
RECEIVER
A/B
RCVR CLK
MUX
RPRA/B
RTRA/B
S1RA/B
S2RA/B
RCVR
SHIFT REG
RECEIVER
4 DEEP
FIFO
CRC
ACCUM
BISYNC
COMPARE
LOGIC
RxD A/B
SD00204
1995 May 1
4
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