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MAX1113CPE 查看數據表(PDF) - Maxim Integrated

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MAX1113CPE Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +4.5V to +5.5V; unipolar input mode; COM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
CONVERSION RATE
Conversion Time (Note 4)
Internal clock
tCONV External clock, 500kHz, 10 clocks/conversion 20
Track/Hold Acquisition Time
tACQ External clock, 2MHz
1
Aperture Delay
Aperture Jitter
Internal Clock Frequency
(Note 5)
50
External Clock-Frequency Range
Used for data transfer only
ANALOG INPUT
Unipolar input, COM = 0V
0
Input Voltage Range, Single-
Ended and Differential (Note 6)
Bipolar input, COM = VREFIN / 2
Multiplexer Leakage Current
Input Capacitance
INTERNAL REFERENCE
REFOUT Voltage
On/off leakage current, VCH_ = 0V or VDD
3.936
TYP MAX UNITS
25
55
µs
µs
10
ns
<50
ps
400
kHz
500 kHz
2
MHz
VREFIN
COM ±
V
VREFIN / 2
±0.01 ±1
µA
18
pF
4.096 4.256
V
REFOUT Short-Circuit Current
REFOUT Temperature Coefficient
Load Regulation (Note 7)
Capacitive Bypass at REFOUT
EXTERNAL REFERENCE AT REFIN
0mA to 0.5mA output load
6
±50
4.5
1
mA
ppm/°C
mV
µF
Input Voltage Range
1
VDD +
50mV
V
Input Current
POWER REQUIREMENTS
(Note 8)
1
20
µA
Supply Voltage
Supply Current
VDD
Full-scale input
CLOAD = 10pF
IDD
Power-down
4.5
5.5
V
Operating mode
135
250
Reference disabled
95
µA
µA
Software
2
SHDN at DGND
3.2
10
Power-Supply Rejection
(Note 9)
PSR
VDD = 4.5V to 5.5V; external reference,
4.096V; full-scale input
±0.4
±4
mV
_______________________________________________________________________________________ 3

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