PCF5077T 查看數據表（PDF） - Philips Electronics

零件编号

产品描述 (功能)

生产厂家

PCF5077T

Power amplifier controller for GSM and PCN systems

Philips Electronics 

Philips Semiconductors

Power amplifier controller for GSM and

PCN systems

Preliminary specification

PCF5077T

The register information is written via a 3-wire serial bus

(see Sections “Serial bus programming” and “Data

format”).

The output of pin DF is for general purpose which can

have three different states (LOW, HIGH and 3-state),

depending on the values of bits DF0 and DF1 in the serial

register.

Dual supply pins are provided for the analog and digital

blocks.

Reset function

After switching on the power supply, the on-chip reset is

active for maximal 50 µs when the rising slope of VDDD has

reached 1.5 ±0.4 V. During this reset, all controllers are

set to the home position and the registers are set to their

default values. If the supply voltage drops below the reset

threshold a constant reset will appear.

Operating conditions

PD = LOW

The serial bus interface is operating, e.g. all registers can

be programmed but no effect will be seen on any pin.

The contents of the registers are passed to the rest of the

circuit only during power-up and with the 13 MHz master

clock applied.

If the low-swing input buffer at pin CLK13 is switched off,

neither the SC-adder nor the slope generator will function.

This means that after the chip is powered-up, the outputs

have to settle again to the programmed register values.

The settling time is dominated by the slow power-up of the

band gap of typically 50 µs.

When the chip is used in the burst mode, it is important to

switch on the PCF5077T before the power module or the

RF power. Otherwise it is possible that a positive spike at

VINT(O) will open the power module.

A safe value is tON = 200 µs between the switching on of

the PCF5077T and the switching on of the power module

respectively the next TRIG (see Fig.3).

PD = HIGH

The whole chip is active. CLK13 clocks the internal state

machine as well as the SC-adder and slope generator.

Every change at TRIG is recognized if the master clock is

running. The contents of the serial bus registers are

processed. If the master clock is switched off during

power-up, the state machine is stopped and the output of

the SC-adder and slope generator becomes undefined.

Nevertheless, by reactivating the master clock, the output

of the SC-adder and slope generator will settle to the old

values again.

The analog integrating controller

The analog integrating controller consists of two

operational amplifiers (OP1 and OP4) and a comparator.

OP1 amplifies the sensor signal and OP4 is used to form

a differential integrator. The comparator is used to limit the

integrator output voltage to the value selected by bits Lim1

and Lim0 in the limiter register.

A (Schottky) diode D1 as external rectifier is connected to

pin VS. The SC-adder block generates the voltage for the

ramping of the power module.The differential integrator

integrates the difference of this voltage and the voltage

detected at the diode. The integrator output voltage VINT(O)

is used to control the power amplifier module.

1997 Nov 19

5

Share Link: