N306AS 查看數據表（PDF） - Fairchild Semiconductor

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N306AS

N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs

Fairchild Semiconductor 

Test Circuits and Waveforms (Continued)

VGS

Ig(REF)

VDS

RL

DUT

+

VDD

-

Figure 17. Gate Charge Test Circuit

VDD

VGS

VDS

Qg(TOT)

Qg(5)

VGS = 5V

VGS = 10V

VGS = 1V

0

Qg(TH)

Qgs

Ig(REF)

0

Qgd

Figure 18. Gate Charge Waveforms

VDS

RL

VGS

RGS

DUT

+

VDD

-

VGS

Figure 19. Switching Time Test Circuit

VDS

tON

td(ON)

tr

90%

tOFF

td(OFF)

tf

90%

10%

0

VGS

10%

0

50%

PULSE WIDTH

10%

90%

50%

Figure 20. Switching Time Waveforms

©2002 Fairchild Semiconductor Corporation

Rev. B, February 2002

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