VSC851-FX 查看數據表（PDF） - Vitesse Semiconductor

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VSC851-FX

1.6 Gb/s 32 X 32 Crosspoint Switch

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

1.6 Gb/s 32x32

Crosspoint Switch

Data Sheet

VSC851

The VSC851 can be configured in Broadcast mode. In Broadcast Mode, at the rising edge of LSTROBE, all

holding registers are updated by input addresses D[4:0]. If a high pulse is applied to GSTROBE, the entire cros-

spoint is configured and the selected data are broadcasted to all of the outputs.

In FlowThru mode, at the rising edge of LSTROBE, all holding registers are set to the numerical representa-

tion of the output which they control, (i.e., 00000 is loaded for output Z[0], 00001 is loaded for output Z[1]

etc.). If a high pulse is then applied to GSTROBE, these values are passed to the control latches. In this mode,

data from I[0] is switched to Z[0] data from I[1] is switched to Z[1], etc. The input address values at D[4:0]

and the output address values at A[4:0] are ignored in FlowThru Mode. All data input and output signals (I+/I-

[0:31], Z+/Z-[0:31]) are differential ECL levels. All other signals are TTL levels. If both BROADCAST and

FLOWTHRU inputs are asserted, the FlowThru Mode overrides the Broadcast Mode.

VSC851 Block Diagram

I + [0:31] Input

64

I - [0:31] Buffers

32 x 32

64

Switch Matrix

Output Z + [0:31]

Buffers Z - [0:31]

Page 2

GSTROBE

LSTROBE

A [4:0]

5 to 32

32

Decode

32 x 32

Control Latches

160

32 x 5

Holding Registers

32

BROADCAST

FLOWTHRU

D [4:0]

5

0,1......31

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52167-0 Rev. 4.1

10/21/99

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