K4S161622H-TC80 查看數據表（PDF） - Samsung
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K4S161622H-TC80 Datasheet PDF : 11 Pages
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SDRAM 16Mb H-die(x16)
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C )
Parameter
Symbol
Test Condition
Version
Unit Note
55 60 70 80
Operating Current
(One Bank Active)
Burst Length =1
ICC1
tRC≥tRC(min)
Io = 0 mA
120 115 105 95 mA
2
Precharge Standby Current in
power-down mode
ICC2P
ICC2PS
CKE≤VIL(max), tCC = 10ns
CKE & CLK≤VIL(max), tCC = ∞
2
mA
2
CKE≥VIH(min), CS≥VIH(min), tCC = 10ns
ICC2N
Input signals are changed one time during
15
Precharge Standby Current
in non power-down mode
30ns
mA
ICC2NS
CKE≥VIH(min), CLK≤VIL(max), tCC = ∞
Input signals are stable
5
Active Standby Current
in power-down mode
ICC3P
ICC3PS
CKE≤VIL(max), tCC = 10ns
CKE & CLK≤VIL(max), tCC = ∞
3
mA
3
CKE≥VIH(min), CS≥VIH(min), tCC = 10ns
Active Standby Current
ICC3N
Input signals are changed one time during
25
mA
in non power-down mode
30ns
(One Bank Active)
ICC3NS
CKE≥VIH(min), CLK≤VIL(max), tCC = ∞
Input signals are stable
15
mA
Operating Current
(Burst Mode)
Io = 0 mA
ICC4
Page Burst 2Banks Activated
tCCD = 2CLKs
155 150 140 130 mA
2
Refresh Current
ICC5
tRC≥tRC(min)
105 100 90 90 mA
3
Self Refresh Current
ICC6
CKE≤0.2V
1
mA
Note : 1. Unless otherwise notes, Input level is CMOS(VIH/VIL=VDDQ/VSSQ) in LVTTL.
2. Measured with outputs open. Addresses are changed only one time during tcc(min).
3. Refresh period is 32ms. Addresses are changed only one time during tcc(min).
4. K4S161622H-TC
Rev. 1.5 August 2004
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