K6R4016C1D-JI10 查看數據表（PDF） - Samsung
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K6R4016C1D-JI10 Datasheet PDF : 12 Pages
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K6R4016C1D
PRELIMPreliminaryPPPPPPPPPINARY
CMOS SRAM
WRITE CYCLE*
Parameter
Symbol
Min
Write Cycle Time
tWC
10
Chip Select to End of Write
tCW
7
Address Set-up Time
tAS
0
Address Valid to End of Write
tAW
7
Write Pulse Width(OE High)
tWP
7
Write Pulse Width(OE Low)
tWP1
10
Write Recovery Time
tWR
0
Write to Output High-Z
tWHZ
0
Data to Write Time Overlap
tDW
5
Data Hold from Write Time
tDH
0
End of Write to Output Low-Z
tOW
3
* The above parameters are also guaranteed at industrial temperature range.
K6R4016C1D-10
Max
-
-
-
-
-
-
-
5
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled , CS=OE=VIL, WE=VIH, UB, LB =VIL)
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
UB, LB
OE
Data out
High-Z
tRC
tAA
tCO
tBA
tBLZ(4,5)
tOE
tOLZ
tLZ(4,5)
tHZ(3,4,5)
tBHZ(3,4,5)
tOHZ
tOH
Valid Data
-7-
Rev 2.0
June 2003
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