K7P401822B 查看數據表（PDF） - Samsung
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K7P401822B Datasheet PDF : 13 Pages
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K7P403622B
K7P401822B
128Kx36 & 256Kx18 SRAM
TRUTH TABLE
K ZZ G SS SW SWa SWb SWc SWd DQa DQb DQc DQd
Operation
X
H
X
X
X
X
X
X
X Hi-Z Hi-Z Hi-Z Hi-Z Power Down Mode. No Operation
X
L
H
X
X
X
X
X
X Hi-Z Hi-Z Hi-Z Hi-Z Output Disabled.
↑
L
L
H
X
X
X
X
X Hi-Z Hi-Z Hi-Z Hi-Z Output Disabled. No Operation
↑
L
L
L
H
X
X
X
X DOUT DOUT DOUT DOUT Read Cycle
↑
L
X
L
L
H
H
H
H Hi-Z Hi-Z Hi-Z Hi-Z No Bytes Written
↑
L
X
L
L
L
H
H
H DIN Hi-Z Hi-Z Hi-Z Write first byte
↑
L
X
L
L
H
L
H
H Hi-Z DIN Hi-Z Hi-Z Write second byte
↑
L
X
L
L
H
H
L
H Hi-Z Hi-Z DIN Hi-Z Write third byte
↑
L
X
L
L
H
H
H
L Hi-Z Hi-Z Hi-Z DIN Write fourth byte
↑
L
X
L
L
L
L
L
L DIN DIN DIN DIN Write all bytes
NOTE : K & K are complementary
ABSOLUTE MAXIMUM RATINGS
Parameter
Core Supply Voltage Relative to VSS
Output Supply Voltage Relative to VSS
Voltage on any I/O pin Relative to VSS
Output Short-Circuit Current
Operating Temperature
Storage Temperature
Symbol
VDD
VDDQ
VTERM
IOUT
TOPR
TSTG
Value
-0.3 to 4.6
VDD
-0.3 to VDD+0.3
25
0 to 70
-65 to 150
Unit
V
V
V
mA
°C
°C
Note
NOTE : Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Core Power Supply Voltage
Output Power Supply Voltage (for 2.5V I/O)
Output Power Supply Voltage (for 3.3V I/O)
Input High Level (for 2.5V I/O)
Input Low Level (for 2.5V I/O)
Input High Level (for 3.3V I/O)
Input Low Level (for 3.3V I/O)
PECL Clock Input High Level
PECL Clock Input Low Level
Clock Input Signal Voltage
Clock Input Differential Voltage
Clock Input Common Mode Voltage
Operating Junction Temperature
Symbol
VDD
VDDQ
VDDQ
VIH
VIL
VIH
VIL
VIH-PECL
VIL-PECL
VIN
VDIF-CLK
VCM-CLK
TJ
Min
3.15
2.375
3.135
1.7
-0.3
2.0
-0.3
2.135
1.490
-0.3
0.2
1.1
10
NOTE
1. For operation with differential PECL clock inputs.
2. For operation with single ended or differential LVCMOS / LVTTL clock input.
Typ
Max
Unit
Note
3.3
3.45
V
2.5
2.9
V
3.3
3.6
V
-
VDD+0.3
V
-
0.7
V
-
VDD+0.3
V
-
0.8
V
-
2.420
V
1
-
1.825
V
1
-
3.45
V
2
-
VDD+0.6
V
2
-
2.1
V
2
-
110
°C
-5-
Jul. 2003
Rev 1.2
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