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KM681001A 查看數據表(PDF) - Samsung

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KM681001A Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
PRELIMINARY
KM681001A
CMOS SRAM
AC CHARACTERISTICS(TA=0 to 70°C, VCC=5.0V±10%, unless otherwise noted.)
TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Reference Levels
Output Loads
Value
0V to 3V
3ns
1.5V
See below
Output Loads(A)
DOUT
255
+5.0V
480
30pF*
Output Loads(B)
for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ
DOUT
255
+5.0V
480
5pF*
* Including Scope and Jig Capacitance
READ CYCLE
Parameter
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Chip Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Chip Selection to Power Up Time
Chip Selection to Power DownTime
NOTE: tCO=tCO1, tCO2/ tLZ=tLZ1, tLZ2/ tHZ=tHZ1, tHZ2
Symbol
tRC
tAA
tCO*
tOE
tLZ*
tOLZ
tHZ*
tOHZ
tOH
tPU
tPD
KM681001A-15
Min
Max
15
-
-
15
-
15
-
8
3
-
0
-
0
6
0
6
3
-
0
-
-
15
KM681001A-20
Min
Max
20
-
-
20
-
20
-
10
3
-
0
-
0
8
0
8
3
-
0
-
-
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-4-
Rev 5.0
February 1998

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